1. Field of the Invention
The present invention relates to the application of low k organic dielectric material used in fabrication of semiconductor devices, and more particularly to a method of etching such films.
2. Description of the Prior Art
As integrated circuit design rules have migrated into the deep submicron regime, both on-chip interconnects and associated fabrication processes have become critical to the performance, reliability, and manufacturing cost of integrated circuits. The needs for higher performance and lower cost for each new generation have led to dramatic reductions in wiring pitches, which have made signal propagation delay in the interconnects an appreciable and growing fraction of the total cycle time. In order to minimize the interconnect RC delay, low dielectric constant (low k, k&lt;3) materials can be used as the interlevel dielectric (ILD) film, the majority of low k materials are based on spin-on organic polymers, such as FLARE, SILK, etc.
Because conventional etch blocking layer materials, such as photoresist materials, for example, are typically removed after etching and the characteristic of organic dielectric layer is similar to photoresist, these conventional spin-on organic low k materials will show limitations on process integration. The first is low resistance to O.sub.2 plasma that requires complicated process sequence to protect these spin-on organic films. A method to solve this problem is that after having formed low k organic dielectric film, a hardmask layer is deposited on the dielectric film that can protect the organic dielectric film from ashing damaging. However, lateral etching can not stop happening. FIGS. 1A to 1C show the steps for detailed process flow of conventional method that damaging side wall of low k organic dielectric film.
After the photoresist 20 is imaged, dry etch 40 will transfer pattern into hardmask layer 14 and low k organic dielectric layer 12, as shown in FIG. 1A. Then, photoresist layer 20 is stripped by O.sub.2 plasma and results lateral etching in organic dielectric layer 12 due to carbon content, as shown in FIG. 1B and FIG. 1C. Such result in dual damascene process will change etch profile, as shown in FIGS. 2A-2D. In this process, low k organic dielectric layers 12 and 13 are separated by a stop layer 16 which can stop trench etching in this layer. A cap layer 14 that can prevent moisture absorption is also like hardmask layer. After forming a photoresist layer 30, a hole pattern is transferred into photoresist layer 30 through imaging, as shown in FIG. 2A. Then, via is formed by using dry etching cap layer 14, low k organic dielectric layer 13, stop layer 16, and low k organic dielectric layer 12, as shown in FIG. 2B. Next, photoresist 30 is removed by using O.sub.2 plasma and low k organic dielectric layers 12 and 13 are etched laterally, as shown in FIG. 2C. The following is trench etch and will cause the poor profile in FIG. 2D.
One way to solve this problem is choosing a type of low k organic silicon-oxide films with lower carbon-content in the film (between 5% to 20%) which showed better resistance to pure O.sub.2 plasma during photoresist strip steps. But these low k organic silicon-oxide films still showed other limitations with conventional damascene etching: (1) O.sub.2 plasma ashing changes k value, (2) O.sub.2 plasma ashing changes etch profile undercut and bowing, (3) low selectivity to PR, and (4) need cap layer on the top of low k film to prevent moisture absorption which need to open before etching.
Due to high carbon content (&gt;30%) in these spin-on organic low k films, another conventional method that requires multiple films as hardmask layer to avoid direct exposure of low k film to O.sub.2 plasma is disclosed in FIGS. 3A-3G. First, a composite insulation layer comprising of low k organic dielectric film 12, SiO.sub.2 film 17 and SiON ARC film 18 is deposited on a substrate 10. Photoresist 30 is formed on the SiON layer 18 and imaged. SiON layer 18 is etched by using dry etch 40, as shown in FIG. 3A. Then photoresist 30 is stripped while low k film 12 can prevent from O.sub.2 plasma damage due to SiO.sub.2 layer 17; then SiO.sub.2 layer 17 is etched using SiON layer 16 as etch hardmask, as shown in FIG. 3B. Next, low k organic dielectric film 13, SiO.sub.2 layer 15, and SiON layer 14 is deposited in sequence and then another photoresist layer 31 is deposited with imaged, as shown in FIG. 3C. As the same steps from FIG. 3A to 3B, SiON layer 14 is etched using photoresist layer 31 as a mask, as shown in FIG. 3D. Then, photoresist layer 31 is stripped with avoiding O.sub.2 plasma damage on low k film 13 for the same reason mentioned above; then, SiO.sub.2 layer 15 is etched using SiON layer 14 as etch hardmask, as shown in FIG. 3E. Then, dual damascene structure is formed by using anisotropically etching low k organic dielectric films 13 and 12, as shown in FIG. 3F. Cross section of dual damascene structure is formed after metal barrier layer and metal layer deposition in sequence and etching excess metal by using chemical mechanical polishing method. However, this method has intricate steps in dual damascene technology.